This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs. Describes in detail the synthesis of logic functions using memories. Includes a look-up tables (LUT) cascade as a new architecture for logic synthesis. Shows logic design methods for index generation functions. Introduces C-measure, which specifies the complexity of Boolean functions. Presents hash-based design methods, which efficiently synthesize index generation functions by pairsof smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits,fault map of memories, and pattern matching. INDICE: Introduction. Basic Elements. Definitions and Basic Properties. MUX-Based Synthesis. Cascade-Based Synthesis. Encoding Method. Functions with Small C-Measures. C-Measure of Sparse Functions. Index Generation Functions. Hash-Based Synthesis. Reduction of the Number of Variables. Various Realizations.Conclusions.
- ISBN: 978-1-4419-8103-5
- Editorial: Springer New York
- Encuadernacion: Cartoné
- Páginas: 250
- Fecha Publicación: 29/03/2011
- Nº Volúmenes: 1
- Idioma: Inglés