Ingredients for successful system level automation design methodology

System Level Design (SLD) and Electronic System Level (ESL) Design are buzzwords of today’s Electronic Design Automation (EDA) industry. The idea is to raise the level of abstraction of design entry for future hardware systems beyondthe register transfer level (RTL). This is necessitated by the increasing complexity of the systems, the immense gate count available on a single chip, therelatively slower growth in designer productivity, and decreasing design turnaround time. Even though a number of languages and design environments have been proposed in the last few years which includes SystemC, Bluespec, SpecC, and System Verilog, none of these satisfy our wish list for a successful system level design language or framework. We want to model heterogeneous system-on-chips (SoCs) which can be based captured by a language capable of expressing and co-simulating multiple models of computation. A first book to discuss the wish lists for an ESL language and environment in a comprehensive manner and provide solutions that enable the wish list The solutions in this book are all implemented in prototypes available from our website which readers can download and experiment with The industry is still not sure about what ESL should be and what a tool supporting ESL design methodology must have INDICE: 1 Introduction. 2 Related Work. 3 Background. 4 Behavioral Hierarchy with Hierarchical FSMs (HFSMs). 5 Simulation Semantics for Heterogeneous Behavioral Hierarchy. 6 Bluespec ESL and its Co-simulation with SystemC DE. 7 Model-driven Validation of SystemC Designs. 8 Service-orientation for Dynamic Integration of Multiple Tools. 9 Summary Evaluations. 10 Conclusion and Future work. A Parsing SystemC using C/C++ Front-end Compiler. B Eclpise-based Plugin for a SystemC IDE. References.

• ISBN: 978-1-4020-8471-3
• Editorial: Springer
• Encuadernacion: Cartoné
• Páginas: 210
• Fecha Publicación: 01/05/2008
• Nº Volúmenes: 1
• Idioma: Inglés