Multi-net optimization of VLSI interconnect

This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits. INDICE: The driving forces behind the interconnect scaling problem: economy and technology.- Interconnect aspects in design methodology and CAD tools.- Scaling dependent electrical modeling of interconnects.- Scaling dependent design metrics and performance goals.- Classification of interconnect sizing problems.- Single-net optimizations.- Multi-net sizing in wire bundles.- Multi-netsizing in general layouts.

• ISBN: 978-1-4614-0820-8
• Editorial: Springer
• Encuadernacion: Cartoné
• Fecha Publicación: 28/06/2012
• Nº Volúmenes: 1
• Idioma: Inglés