Functional design errors in digital circuits: diagnosis correction and layout repair

Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrumof innovative methods to automate the debugging process throughout the designflow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization thatsimplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair frameworkto automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enablethe design and manufacture of more reliable electronic devices. Coverage of novel techniques to automate IC debugging, a subject rarely covered in other books Comprehensive scope and solutions: from RTL to post-silicon debugging The innovative techniques covered in this book are recent and have been featured by MIT Technology Review, EE Times, SCD Source, IEEE Computer, and other sources First empirical comparison of several methods for spare-cell insertion INDICE: Dedication. List of Figures. List of Tables. Preface.- Part I Background and Prior Art. 1. Introduction. 2. Current Landscape in Design and Verification. 3. Finding Bugs and Repairing Circuits.- Part II FogClearMethodologies and Theoretical Advances in Error Repair. 4. Circuit Design and Verification Methodologies. 5. Counterexample-Guided Error-Repair Framework. 6. Signature-Based Resynthesis Techniques. 7. Symmetry-Based Rewiring.- Part III FogClear Components. 8. Bug Trace Minimization. 9. Functional Error Diagnosis and Correction. 10. Incremental Verification for Physical Synthesis. 11. Post-Silicon Debugging and Layout Repair. 12. Methodologies for Spare-Cell Insertion. 13. Conclusions.- Index. References.

• ISBN: 978-1-4020-9364-7
• Editorial: Springer
• Encuadernacion: Cartoné
• Páginas: 200
• Fecha Publicación: 01/01/2009
• Nº Volúmenes: 1
• Idioma: Inglés