Optimizing Analog CMOS Design presents methods for the optimized design of analog CMOS circuits through the design choices of Metal-Oxide Semiconductor Field-Effect Transistor device drain current, inversion level, and channel length. The text provides an overview of circuit design in all regions of Metal Oxide Semiconductor operation, emphasizing the importance of methods that freely permit design in all regions of MOS. Two appendices contain CMOS test devices used to validate methods contained in the book, and an analog MOS design optimization spreadsheet describing user inputs, mapping of device operation, and equations.
- ISBN: 978-0-470-03136-0
- Editorial: John Wiley & Sons
- Encuadernacion: Cartoné
- Páginas: 624
- Fecha Publicación: 30/05/2008
- Nº Volúmenes: 1
- Idioma: Inglés