Low Power Design with High-Level Power Estimation and Power-Aware Synthesis

This book presents novel research techniques, algorithms, methodologies and experimental results for high level power estimation and power aware high-level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC/FPGA design.

• ISBN: 978-1-4899-8780-8
• Editorial: Springer
• Encuadernacion: Rústica
• Fecha Publicación: 23/10/2014
• Nº Volúmenes: 1
• Idioma: Inglés